1. Overview
The CPU module PM9263 is based on AT91SAM9263 which is capable to boot from an external NOR-Flash or using its internal ROM bootloader from DataFlash, NAND-Flash or SD-card. The selection is made by BMS pin sampled at reset:
BMS = 0, Boot on External Memory
- Boot at slow clock
- Boot with the default configuration for the Static Memory Controller, byte select mode, 16-bit data bus, Read/Write controlled by Chip Select, allows boot on 16-bit non-volatile memory.
- The customer-programmed software must perform a complete configuration.
BMS = 1, Boot on Embedded ROM
The system boots on Boot Program.
- Boot at slow clock
- Auto detection of the main oscillator
- Downloads and runs an application from external storage media into internal SRAM
2. Problem description
When booting on embedded ROM (BMS = 1) the CPU delays sometimes with 16 seconds.
3. Problem explaining
When VDDBU is powered on, the slow clock oscillator (32.768kHz) begins to oscillate. The reset controller waits some time to make sure the Slow Clock oscillator is stable before starting up the device. The length of startup time is hardcoded to comply with the Slow Clock Oscillator startup time.
After the starting up, the internal ROM loader enables the main oscillator and calculates the quartz frequency using the Main Clock Frequency Counter. Because the startup time of the slow clock oscillator can vary in very wide range (100ms – 1200ms) it could happen that it is not stable at the moment of calculating of the quartz frequency. The wrongly calculated main quartz frequency causes not proper booting and a watchdog fault because the watchdog timer is enabled after power-up with its default value 16 seconds.
4. Fixing
Solution 1:
Use a NOR-Flash bootloader (BMS = 0) which doesn’t use auto detecting of the main crystal frequency like the U-BOOT provided by Ronetix.
Solution 2:
If the hardware configuration doesn’t allow boot from NOR-Flash, then Ronetix can provide PM9263 with BMS = 0 (1k pull-down to PB3).
If the using of the embedded ROM is a requirement, then a small NOR-Flash loader can be used to provide the necessary startup delay and to start the internal bootloader:
/*!
* @brief NOR Flash bootloader which starts the internal bootloader
* of AT91SAM9263 with some delay to ensure stable slow clock
* oscillations
* @note Copyright (c) Ronetix GmbH. All rights reserved.
* @author Ilko Iliev
* @date 22.02.2012
*/
.text
.code 32
.global start
start:
b reset
reset:
/* delay */
mov r0, #0x300
loop:
subs r0, r0, #1
bne loop
/* jump to internal bootloader */
ldr pc, ROM_START_ADDR
/* internal bootloader location */
ROM_START_ADDR:
.word 0x400000
The following Makefile can be used to build the above code:
GCC = arm-elf-gcc
LD = arm-elf-ld
OBJCOPY = arm-elf-objcopy
all:
$(GCC) -c -o start.o start.S
$(LD) -Ttext 0x00000000 --entry start -o start.elf start.o
$(OBJCOPY) -O binary start.elf start.bin
clean:
rm -f *.o *.map *.elf *.bin